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Binary phase-shift keying may be achieved by using the binary polar NRZ signal to multiply the carrier, as shown in Fig. 10.12a. For a binary signal p(t), the modulated wave may be written as e(t) p(t) cos

(10.14)

When p(t) 1, e(t) cos 0t, and when p(t) 1, e(t) cos 0t, which is equivalent to cos( 0t 180 ) Bandpass filtering of the modulated wave may be used instead of baseband filtering to limit the radiated spectrum The bandpass filter also may incorporate the square root of the raised-cosine rolloff, described in Sec 105, required to reduce ISI (see, for example, Pratt and Bostian, 1986) At the receiver (Fig 1012b), the received modulated carrier will undergo further bandpass filtering to complete the raised-cosine response and to limit input noise The filtered modulated wave, er(t) pr(t) cos 0t , is passed into another multiplier circuit, where it is multiplied by a replica of the carrier wave cos 0t The output from the multiplier is therefore equal to pr(t) cos2 0t This can be expanded as pr(t)(05 05 cos 2 0t).

A three-element array of doubles specifying the center of the arc in the WCS The radius of the arc The start angle of the arc given in radians with respect to the X-axis of the WCS The end angle of the arc given in radians with respect to the X-axis of the WCS

The low-pass filter is used to remove the second harmonic component of the carrier, leaving the low-frequency output, which is 05p (t), where p (t) is the filtered version of the input binary wave p(t) It will be seen that the modulator is basically the same as that used to produce the DSBSC signal described in Sec 93 In the present instance, the bandpass filter following the modulator is used to select the complete DSBSC signal rather than a single sideband The receiver is shown in more detail in Fig 1013 As shown, a locally generated version of the unmodulated carrier wave is required as one of the inputs to the multiplier The locally generated carrier has to be exactly in phase with the incoming carrier, and hence this type of detection is termed coherent detection.

Figure 13-1

Coherent detection necessitates recovering the unmodulated carrier phase information from the incoming modulated wave, and this is achieved in the carrier recovery (CR) section shown in Fig 1013 As discussed in Sec 105, to avoid ISI, sampling must be carried out at the bit rate and at the peaks of the output pulses This requires the.

Block schematic of a coherent detector showing the carrier recovery section and the bit timing recovery.

sample-and-hold circuit to be accurately synchronized to the bit rate, which necessitates a bit timing recovery (BTR) section, as shown in Fig. 10.13. Thermal noise at the receiver will result in noise phase modulation of the carrier, and so the demodulated waveform p (t) will be accompanied by noise. The noisy p (t) signal is passed into the threshold detector which regenerates a noise-free output but one containing some bit errors as a result of the noise already present on the waveform. The QPSK signal has many features in common with BPSK and will be examined before describing in detail the carrier and bit timing recovery circuits and the effects of noise.

With QPSK, the binary data are converted into 2-bit symbols which are then used to phase modulate the carrier Since four combinations containing 2 bits are possible from a binary alphabet (logical 1s and 0s), the carrier phase can be shifted to one of four states Figure 1014a shows one way in which QPSK modulation can be achieved The incoming bit stream p(t) is converted in the serial-toparallel converter into two binary streams The conversion is illustrated by the waveforms of Fig 1014b For illustration purposes, the bits in the p(t) waveform are labeled a, b, c, d, e, and f The serial-to-parallel converter switches bit a to the I port and at the same time switches bit b to the Q port.